In this section
@article{Leene:2014:10.1049/el.2013.4196,
author = {Leene, LB and Constandinou, TG},
doi = {10.1049/el.2013.4196},
journal = {Electronics Letters},
pages = {583--585},
title = {Ultra-low power design strategy for two-stage amplifier topologies},
url = {http://dx.doi.org/10.1049/el.2013.4196},
volume = {50},
year = {2014}
}
TY - JOUR
AB - A novel two-stage amplifier topology and ultra-low power design strategy for two-stage amplifiers that utilises pole zero cancellation to address the additional power requirements for stability are presented. For a 288 nA total bias, the presented amplifier achieves a 1.07 MHz unity gain frequency with a 8560 pF MHz/mA figure of merit.
AU - Leene,LB
AU - Constandinou,TG
DO - 10.1049/el.2013.4196
EP - 585
PY - 2014///
SN - 0013-5194
SP - 583
TI - Ultra-low power design strategy for two-stage amplifier topologies
T2 - Electronics Letters
UR - http://dx.doi.org/10.1049/el.2013.4196
UR - http://hdl.handle.net/10044/1/13747
UR - http://digital-library.theiet.org/content/journals/10.1049/el.2013.4196
VL - 50
ER -