CAD laboratory

The Centre for Bio-Inspired Technology hosts a CAD Laboratory equipped with High-end workstations and industry-strength EDA tools for the design, simulation & verification of integrated circuits & microsystems.

CAD is an indispensable process in any modern engineering design. This laboratory is equipped with high performance workstations and servers to support high-end tools for microelectronic design, microsystems (including MEMS, microfluidics), RF/microwave devices, mechanical design, etc. For example, researchers here develop application-specific integrated circuits (ASICs) that are then sent for fabrication at CMOS foundries. The facility has licensed all industry standard tools including Cadence, Mentor Graphics, Synopsys, Ansys, Solidworks, and several others, and a range of modern process technologies down to the 45nm node. All servers can be remotely connected from anywhere around the world via the internet enabling designers to work remotely and multiple chip designs can be carried out in parallel.

Location: Bessemer Building, B425 (Server Room), B420a (CAD Lab)

Facility Contacts:

Peilong Feng (peilong.feng14@imperial.ac.uk)

Available Design Resources

• IC Design: Cadence Design Systems (IC, Assura, Dracula, Encounter, MMSIM), Siemens EDA (Eldo, Calibre, ModelSim), Synopsys (DC Ultra, IC Compiler, Formality, Synplify).
• Process Design: Synopsys Advanced TCAD, Coventor SEMulator/MEMulator
• Mask Layout: CleWin 4.0, Cadence Virtuoso Layout Editor
• RF/EM Design: Comsol Multiphysics, Maxwell 2D/3D, Agilent ADS, CST
• PCB Design: Altium
• Maths/Engineering: Mathworks MATLAB, NI Labview 

Process Technologies

• ON Semiconductor (AMIS): 0.35um, 0.5um, 0.7um CMOS
• Austriamicrosystems: 0.18um, 0.35um, 0.8um CMOS and BiCMOS
• IHP: 0.13um, 0.25um SiGe:C Bipolar and BiCMOS
• ST Microelectronics: 40nm, 45nm, 65nm, 90nm, 0.12um, 0.18um CMOS
• TSMC: 40nm, 65nm, 90nm, 0.13um, 0.18um, CMOS
• UMC: 65nm 90nm, 0.13um, 0.18um, CMOS
• X-FAB: 0.18um CMOS and SOI CMOS